From 3280003340306a1cdf901e88bac277ddfce94395 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Milan=20P=2E=20Stani=C4=87?= Date: Thu, 4 Jun 2026 10:41:33 +0000 Subject: [PATCH xf86-video-ati] testing/u-boot-spacemit: build with mainline opensbi pick patches from https://git.aurel32.net/uboot-2022.10.git embed opensbi in u-boot.itb --- ...ts-add-P1-regulator-to-MUSE-Book-boa.patch | 136 ++++ ..._loader-suppress-error-print-message.patch | 55 -- testing/u-boot-spacemit/APKBUILD | 16 +- .../k1-bl-v2.2.y-opensbi-embeded.patch | 177 +++++ .../use-mainline-opensbi.patch | 739 ++++++++++++++++++ 5 files changed, 1063 insertions(+), 60 deletions(-) create mode 100644 testing/u-boot-spacemit/0001-k1-x_MUSE-Book.dts-add-P1-regulator-to-MUSE-Book-boa.patch delete mode 100644 testing/u-boot-spacemit/004-efi_loader-suppress-error-print-message.patch create mode 100644 testing/u-boot-spacemit/k1-bl-v2.2.y-opensbi-embeded.patch create mode 100644 testing/u-boot-spacemit/use-mainline-opensbi.patch diff --git a/testing/u-boot-spacemit/0001-k1-x_MUSE-Book.dts-add-P1-regulator-to-MUSE-Book-boa.patch b/testing/u-boot-spacemit/0001-k1-x_MUSE-Book.dts-add-P1-regulator-to-MUSE-Book-boa.patch new file mode 100644 index 00000000000..99c4196e9a9 --- /dev/null +++ b/testing/u-boot-spacemit/0001-k1-x_MUSE-Book.dts-add-P1-regulator-to-MUSE-Book-boa.patch @@ -0,0 +1,136 @@ +From a24aa9c0f6dee8b5db1ca5c79ad298191f65fefc Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Milan=20P=2E=20Stani=C4=87?= +Date: Sun, 24 May 2026 10:49:28 +0000 +Subject: [PATCH] k1-x_MUSE-Book.dts: add P1 regulator to MUSE-Book board + +It's need to add SBI SRST extension support in OpenSBI +--- + arch/riscv/dts/k1-x_MUSE-Book.dts | 112 ++++++++++++++++++++++++++++++ + 1 file changed, 112 insertions(+) + +diff --git a/arch/riscv/dts/k1-x_MUSE-Book.dts b/arch/riscv/dts/k1-x_MUSE-Book.dts +index 8372b955..aeeacfec 100644 +--- a/arch/riscv/dts/k1-x_MUSE-Book.dts ++++ b/arch/riscv/dts/k1-x_MUSE-Book.dts +@@ -83,6 +83,118 @@ + }; + }; + ++&i2c8 { ++ status = "okay"; ++ pmic@41 { ++ compatible = "spacemit,p1"; ++ reg = <0x41>; ++ status = "okay"; ++ ++ regulators { ++ buck1 { ++ regulator-name = "vdd_core"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck2 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck3_1v8: buck3 { ++ regulator-name = "vdd_1v8"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck4 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck5 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck6 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ aldo1 { ++ regulator-name = "vdd_1v8_mmc"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ regulator-boot-on; ++ }; ++ ++ aldo2 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ aldo3 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ aldo4 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo1 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo2 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo3 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo4 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo5 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo6 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo7 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ }; ++ }; ++}; ++ + &pinctrl { + pinctrl-single,gpio-range = < + &range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4) +-- +2.54.0 + diff --git a/testing/u-boot-spacemit/004-efi_loader-suppress-error-print-message.patch b/testing/u-boot-spacemit/004-efi_loader-suppress-error-print-message.patch deleted file mode 100644 index 7772c0b465c..00000000000 --- a/testing/u-boot-spacemit/004-efi_loader-suppress-error-print-message.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 60013790aa6b8ba65fdb7546f715314d00591f81 Mon Sep 17 00:00:00 2001 -From: Tejas Bhumkar -Date: Fri, 7 Jun 2024 06:32:58 -0400 -Subject: [PATCH] efi_loader : Suppress error print message - -Currently, on certain Xilinx platforms, an issue has been -identified, manifesting as follows: - -Starting kernel ... - -efi_free_pool: illegal free 0x0000000077830040 -efi_free_pool: illegal free 0x000000007782d040 -efi_free_pool: illegal free 0x000000007782c040 - -The issue arises when the ramdisk image is relocated, placing -it within the previously allocated EFI memory region( as EFI -is established quite early in U-Boot). Consequently, when -attempting to release memory in the EFI memory region during -the handover process to the kernel,we encounter memory violations. - -Highlighting that EFI remains active primarily during the -booting of an EFI application, and the lmb persists while -configuring images for the boot process. Since we aren't -utilizing the EFI memory region during the boot process, -there is no adverse impact even in the event of a violation. - -Currently, there is an ongoing discussion regarding the handling -strategies of three memory allocators: malloc, lmb, and EFI. This -discussion is documented in the email chain -titled "Proposal: U-Boot memory management." - -Therefore, it is advisable to suppress the print message during -the boot process for now. - -Signed-off-by: Tejas Bhumkar ---- - lib/efi_loader/efi_memory.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c -index e048a545e4..7fea2f79c8 100644 ---- a/lib/efi_loader/efi_memory.c -+++ b/lib/efi_loader/efi_memory.c -@@ -660,7 +660,7 @@ efi_status_t efi_free_pool(void *buffer) - /* Check that this memory was allocated by efi_allocate_pool() */ - if (((uintptr_t)alloc & EFI_PAGE_MASK) || - alloc->checksum != checksum(alloc)) { -- printf("%s: illegal free 0x%p\n", __func__, buffer); -+ debug("%s: illegal free 0x%p\n", __func__, buffer); - return EFI_INVALID_PARAMETER; - } - /* Avoid double free */ --- -2.39.2 - diff --git a/testing/u-boot-spacemit/APKBUILD b/testing/u-boot-spacemit/APKBUILD index 2e55448a6f4..af413ee0085 100644 --- a/testing/u-boot-spacemit/APKBUILD +++ b/testing/u-boot-spacemit/APKBUILD @@ -4,7 +4,7 @@ pkgname=u-boot-spacemit _basever=2022.10 _realver=2.2.9 pkgver=${_basever}.${_realver} -pkgrel=0 +pkgrel=1 pkgdesc="u-boot bootloader for spacemit" url="https://gitee.com/bianbu-linux/uboot-2022.10" arch="riscv64" @@ -21,7 +21,7 @@ makedepends=" flex gnutls-dev linux-headers - opensbi-spacemit + opensbi openssl-dev py3-elftools py3-setuptools @@ -32,10 +32,12 @@ makedepends=" source="$pkgname-v$_realver.tar.gz::$url/repository/archive/k1-bl-v$_realver-release.tar.gz 002-SpacemiT-K1X-Fixups.patch 003-SpacemiT-K1X-Defconfig-Fixups.patch - 004-efi_loader-suppress-error-print-message.patch 005-Orange-Pi-RV2-u-boot-support-for-XM25QU128C-flash.patch 006-orangepi-rv2-r2s-fit.patch k1-x.env + use-mainline-opensbi.patch + 0001-k1-x_MUSE-Book.dts-add-P1-regulator-to-MUSE-Book-boa.patch + k1-bl-v2.2.y-opensbi-embeded.patch " builddir=$srcdir/uboot-$_basever-k1-bl-v$_realver-release @@ -50,14 +52,16 @@ prepare() { scripts/config --file .config --disable LOCALVERSION_AUTO scripts/config --file .config --disable AUTOBOOT_DELAY_STR scripts/config --file .config --disable AUTOBOOT_STOP_STR + scripts/config --file .config --disable ENV_IS_IN_NFS scripts/config --file .config --enable VIDEO_MIPI_DSI + scripts/config --file .config --enable ENV_IS_IN_SPI_FLASH scripts/config --file .config --enable USE_PREBOOT scripts/config --file .config --set-str PREBOOT "usb start" scripts/config --file .config --set-str LOCALVERSION " $_realver" } build() { - export OPENSBI="/usr/share/opensbi-spacemit/fw_dynamic.itb" + export OPENSBI="/usr/share/opensbi/generic/firmware/fw_dynamic.bin" make } @@ -76,8 +80,10 @@ sha512sums=" 4b1ee5ac4068601fa049bb07736c1a335185f6d9e3bfd205953fd23149c2690b4ee6541f3596e5a593caf46a31bb42dc95e95176a2918a3899c5f5d5c57c2beb u-boot-spacemit-v2.2.9.tar.gz 0445f28db59821af8c076c323ea675e16e99581d25c914342da7a78200740b88ee9abcd136cc98aaa5e62c866e145e38bdc8d3242a3437e355718c2c8f5ed179 002-SpacemiT-K1X-Fixups.patch aaf92d757d9f808d3441595c2f680a217946be2042a3191456bc7fd84c04815c081dc65bfb3b8b08f6f02158cd201210dc4e76c57b75ae2e82203874a0952071 003-SpacemiT-K1X-Defconfig-Fixups.patch -d5b1b16e68e0ca8c070440b742ee16293174e26bd2d4202244ef089414c2ab15c92656919110561476cace53b362217b0f91c426641df422cc3813d71c198361 004-efi_loader-suppress-error-print-message.patch f7569e0a673818a19f164f907f9ace3b7a09df5d2cbbe7d234dd0ec907e3ee4ab49546dc9433064d680f910631c072f250e46d4da673d7753c0983add6ff50b2 005-Orange-Pi-RV2-u-boot-support-for-XM25QU128C-flash.patch 98d572bdd1c0dfded33e0de8497e32712969e72435ac6b878177e650769b2b99007fbb551c19c3d6bd223e994a0fa80ca4809902d11cbb500fa27f38fda49f1b 006-orangepi-rv2-r2s-fit.patch 9c26e76bde12043903cd674e3a8da96a18ee772e54ccb2ded26153c50a5d08d233269c663ae5444dc29ce94d809193574c437a4db27566dc1ad14db345bbe6a9 k1-x.env +646d27f9307ca65058e9b1b7eee80fc2af0143563020a608caa6abd728602a8f0c594e0bac1755add8f34329ef689559e784e95d2b37664dd479a5e077f4f4c3 use-mainline-opensbi.patch +67b6758d98cf39211695bb786cf4a4b01b1352432395509766e1f95bf28248040c2807b931b6aff552b49a00ba3f4fa1d7d61d55edd9c0d34e6de7cb01da51b1 0001-k1-x_MUSE-Book.dts-add-P1-regulator-to-MUSE-Book-boa.patch +082b69bb47ae8356852a15e73e422e5bd155964e2e1319051ef939b83f7d8cdb7595552f9a3f1fcd0a17871b58c975cf4d68a41262fd6025264dca088802a597 k1-bl-v2.2.y-opensbi-embeded.patch " diff --git a/testing/u-boot-spacemit/k1-bl-v2.2.y-opensbi-embeded.patch b/testing/u-boot-spacemit/k1-bl-v2.2.y-opensbi-embeded.patch new file mode 100644 index 00000000000..d4403743a34 --- /dev/null +++ b/testing/u-boot-spacemit/k1-bl-v2.2.y-opensbi-embeded.patch @@ -0,0 +1,177 @@ +From 3b00a1ec43281d0ebed0f1205defb32fb79f9a67 Mon Sep 17 00:00:00 2001 +From: Aurelien Jarno +Date: Sun, 19 Apr 2026 16:30:17 +0000 +Subject: Add support to embed OpenSBI firmware into the u-boot.itb image + +This is how upstream u-boot is typically configured. + +On the Milk-V Jupiter board the dedicated "opensbi" NOR flash partition +is too small to fit the upstream OpenSBI build. Embedding the firmware +in u-boot.itb enables the use of the upstream OpenSBI version on this +board. +--- + board/spacemit/k1-x/config.mk | 1 + + board/spacemit/k1-x/configs/uboot_fdt.its | 31 +++++++++++++++++++++++++++++++ + configs/k1_defconfig | 5 ++--- + 3 files changed, 34 insertions(+), 3 deletions(-) + +diff --git a/board/spacemit/k1-x/config.mk b/board/spacemit/k1-x/config.mk +index f9400b6a..033ae8ef 100644 +--- a/board/spacemit/k1-x/config.mk ++++ b/board/spacemit/k1-x/config.mk +@@ -33,6 +33,7 @@ cmd_build_itb = \ + $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/dtb/ && \ + cp $(srctree)/u-boot-nodtb.bin \ + $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/ && \ ++ cp $(OPENSBI) $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/ && \ + $(srctree)/tools/mkimage -f \ + $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/uboot_fdt.its \ + -r $(srctree)/$2;\ +diff --git a/board/spacemit/k1-x/configs/uboot_fdt.its b/board/spacemit/k1-x/configs/uboot_fdt.its +index bd1fa59f..afc69ebd 100644 +--- a/board/spacemit/k1-x/configs/uboot_fdt.its ++++ b/board/spacemit/k1-x/configs/uboot_fdt.its +@@ -19,6 +19,20 @@ + }; + }; + ++ opensbi { ++ description = "OpenSBI fw_dynamic Firmware"; ++ type = "firmware"; ++ os = "opensbi"; ++ arch = "riscv"; ++ compression = "none"; ++ load = <0x0 0x0>; ++ entry = <0x0 0x0>; ++ data = /incbin/("../fw_dynamic.bin"); ++ hash-1 { ++ algo = "crc32"; ++ }; ++ }; ++ + fdt_1 { + description = "k1-x_deb1"; + type = "flat_dt"; +@@ -179,86 +193,103 @@ + conf_1 { + description = "k1-x_deb1"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_1"; + }; + conf_2 { + description = "k1-x_MINI-PC"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_2"; + }; + conf_3 { + description = "k1-x_MUSE-N1"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_3"; + }; + conf_4 { + description = "k1-x_MUSE-Pi"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_4"; + }; + conf_5 { + description = "k1-x_milkv-jupiter"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_5"; + }; + conf_6 { + description = "k1-x_MUSE-Book"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_6"; + }; + conf_7 { + description = "m1-x_milkv-jupiter"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_7"; + }; + conf_8 { + description = "k1-x_lpi3a"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_8"; + }; + conf_9 { + description = "k1-x_MUSE-Card"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_9"; + }; + conf_10 { + description = "k1-x_MUSE-Paper-mini-4g"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_10"; + }; + conf_11 { + description = "k1-x_ZT001H"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_11"; + }; + conf_12 { + description = "k1-x_uav"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_12"; + }; + conf_13 { + description = "k1-x_MUSE-Paper2"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_13"; + }; + conf_14 { + description = "k1-x_MUSE-Pi-Pro"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_14"; + }; + conf_15 { + description = "k1-x_LX-V10"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_15"; + }; + conf_16 { + description = "k1-x_som"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_16"; + }; + conf_17 { + description = "k1-x_ZT_RVOH007"; + loadables = "uboot"; ++ firmware = "opensbi"; + fdt = "fdt_17"; + }; + }; +diff --git a/configs/k1_defconfig b/configs/k1_defconfig +index 5d79e8d5..8e2ebcc3 100644 +--- a/configs/k1_defconfig ++++ b/configs/k1_defconfig +@@ -72,9 +72,8 @@ CONFIG_SPL_POWER=y + # CONFIG_SPL_SPI_FLASH_TINY is not set + CONFIG_SPL_SPI_FLASH_MTD=y + CONFIG_SPL_MTD_LOAD=y +-CONFIG_SYS_LOAD_IMAGE_PARTITION_NAME="opensbi" +-CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION=y +-CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION_NAME="uboot" ++CONFIG_SYS_LOAD_IMAGE_PARTITION_NAME="uboot" ++CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION=n + CONFIG_SPL_USB_GADGET=y + CONFIG_SPL_FASTBOOT_LOAD=y + CONFIG_SPL_USB_SDP_SUPPORT=y +-- +cgit v1.2.3 + diff --git a/testing/u-boot-spacemit/use-mainline-opensbi.patch b/testing/u-boot-spacemit/use-mainline-opensbi.patch new file mode 100644 index 00000000000..1e5b3e28c20 --- /dev/null +++ b/testing/u-boot-spacemit/use-mainline-opensbi.patch @@ -0,0 +1,739 @@ +From a4147c737c822cfdff7ecaf25ed8013b3c863b72 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= +Date: Fri, 24 Jan 2025 16:47:48 +0100 +Subject: [PATCH 3/8] serial: ns16550: Add Intel XScale support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Add compatible string for the Intel XScale variant of the 16550. Needed +to match upstream. + +Signed-off-by: Duje Mihanović +Reviewed-by: Stefan Roese +--- + drivers/serial/ns16550.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c +index ef4b5f83..94a222b1 100644 +--- a/drivers/serial/ns16550.c ++++ b/drivers/serial/ns16550.c +@@ -626,6 +626,7 @@ static const struct udevice_id ns16550_serial_ids[] = { + { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 }, + { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 }, + { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 }, ++ { .compatible = "intel,xscale-uart", .data = PORT_NS16550 }, + {} + }; + #endif /* OF_REAL */ +-- +2.54.0 + + +From 83dca69f659daa03650cd3d0bf1d06f029d795df Mon Sep 17 00:00:00 2001 +From: Aurelien Jarno +Date: Fri, 10 Apr 2026 23:41:18 +0200 +Subject: [PATCH 4/8] k1-x.dtsi: replace uart compatible property to match + upstream Linux and OpenSBI + +--- + arch/riscv/dts/k1-x.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/riscv/dts/k1-x.dtsi b/arch/riscv/dts/k1-x.dtsi +index 341a4129..6e940ef9 100644 +--- a/arch/riscv/dts/k1-x.dtsi ++++ b/arch/riscv/dts/k1-x.dtsi +@@ -290,7 +290,7 @@ + }; + + uart0: uart@d4017000 { +- compatible = "ns16550"; ++ compatible = "spacemit,k1-uart", "intel,xscale-uart"; + reg = <0x00000000 0xD4017000 0x00000000 0x00000100>; + reg-shift = <2>; + reg-io-width = <4>; +-- +2.54.0 + + +From 6d6cd5f9d5eb52e5a0651bceb8f4d176c220d266 Mon Sep 17 00:00:00 2001 +From: Aurelien Jarno +Date: Sat, 11 Apr 2026 21:27:55 +0200 +Subject: [PATCH 5/8] k1-x.dtsi: update riscv,isa properties to match the + upstream kernel + +It seems that zicbom and zicboz are very important for upstream version +of OpenSBI. +--- + arch/riscv/dts/k1-x.dtsi | 92 ++++++++++++++++++++++++++++++++++------ + 1 file changed, 80 insertions(+), 12 deletions(-) + +diff --git a/arch/riscv/dts/k1-x.dtsi b/arch/riscv/dts/k1-x.dtsi +index 6e940ef9..7bb80070 100644 +--- a/arch/riscv/dts/k1-x.dtsi ++++ b/arch/riscv/dts/k1-x.dtsi +@@ -28,7 +28,16 @@ + device_type = "cpu"; + reg = <0>; + status = "okay"; +- riscv,isa = "rv64imafdcv"; ++ riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt"; ++ riscv,isa-base = "rv64i"; ++ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom", ++ "zicbop", "zicboz", "zicntr", "zicond", "zicsr", ++ "zifencei", "zihintpause", "zihpm", "zfh", "zba", ++ "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", ++ "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; ++ riscv,cbom-block-size = <64>; ++ riscv,cbop-block-size = <64>; ++ riscv,cboz-block-size = <64>; + mmu-type = "riscv,sv39"; + + cpu0_intc: interrupt-controller { +@@ -42,7 +51,16 @@ + device_type = "cpu"; + reg = <1>; + status = "okay"; +- riscv,isa = "rv64imafdcv"; ++ riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt"; ++ riscv,isa-base = "rv64i"; ++ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom", ++ "zicbop", "zicboz", "zicntr", "zicond", "zicsr", ++ "zifencei", "zihintpause", "zihpm", "zfh", "zba", ++ "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", ++ "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; ++ riscv,cbom-block-size = <64>; ++ riscv,cbop-block-size = <64>; ++ riscv,cboz-block-size = <64>; + mmu-type = "riscv,sv39"; + + cpu1_intc: interrupt-controller { +@@ -56,7 +74,16 @@ + device_type = "cpu"; + reg = <2>; + status = "okay"; +- riscv,isa = "rv64imafdcv"; ++ riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt"; ++ riscv,isa-base = "rv64i"; ++ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom", ++ "zicbop", "zicboz", "zicntr", "zicond", "zicsr", ++ "zifencei", "zihintpause", "zihpm", "zfh", "zba", ++ "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", ++ "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; ++ riscv,cbom-block-size = <64>; ++ riscv,cbop-block-size = <64>; ++ riscv,cboz-block-size = <64>; + mmu-type = "riscv,sv39"; + + cpu2_intc: interrupt-controller { +@@ -69,8 +96,16 @@ + compatible = "riscv"; + device_type = "cpu"; + reg = <3>; +- status = "okay"; +- riscv,isa = "rv64imafdcv"; ++ riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt"; ++ riscv,isa-base = "rv64i"; ++ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom", ++ "zicbop", "zicboz", "zicntr", "zicond", "zicsr", ++ "zifencei", "zihintpause", "zihpm", "zfh", "zba", ++ "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", ++ "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; ++ riscv,cbom-block-size = <64>; ++ riscv,cbop-block-size = <64>; ++ riscv,cboz-block-size = <64>; + mmu-type = "riscv,sv39"; + + cpu3_intc: interrupt-controller { +@@ -83,8 +118,16 @@ + compatible = "riscv"; + device_type = "cpu"; + reg = <4>; +- status = "okay"; +- riscv,isa = "rv64imafdcv"; ++ riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt"; ++ riscv,isa-base = "rv64i"; ++ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom", ++ "zicbop", "zicboz", "zicntr", "zicond", "zicsr", ++ "zifencei", "zihintpause", "zihpm", "zfh", "zba", ++ "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", ++ "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; ++ riscv,cbom-block-size = <64>; ++ riscv,cbop-block-size = <64>; ++ riscv,cboz-block-size = <64>; + mmu-type = "riscv,sv39"; + + cpu4_intc: interrupt-controller { +@@ -97,8 +140,16 @@ + compatible = "riscv"; + device_type = "cpu"; + reg = <5>; +- status = "okay"; +- riscv,isa = "rv64imafdcv"; ++ riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt"; ++ riscv,isa-base = "rv64i"; ++ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom", ++ "zicbop", "zicboz", "zicntr", "zicond", "zicsr", ++ "zifencei", "zihintpause", "zihpm", "zfh", "zba", ++ "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", ++ "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; ++ riscv,cbom-block-size = <64>; ++ riscv,cbop-block-size = <64>; ++ riscv,cboz-block-size = <64>; + mmu-type = "riscv,sv39"; + + cpu5_intc: interrupt-controller { +@@ -111,8 +162,16 @@ + compatible = "riscv"; + device_type = "cpu"; + reg = <6>; +- status = "okay"; +- riscv,isa = "rv64imafdcv"; ++ riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt"; ++ riscv,isa-base = "rv64i"; ++ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom", ++ "zicbop", "zicboz", "zicntr", "zicond", "zicsr", ++ "zifencei", "zihintpause", "zihpm", "zfh", "zba", ++ "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", ++ "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; ++ riscv,cbom-block-size = <64>; ++ riscv,cbop-block-size = <64>; ++ riscv,cboz-block-size = <64>; + mmu-type = "riscv,sv39"; + + cpu6_intc: interrupt-controller { +@@ -126,7 +185,16 @@ + device_type = "cpu"; + reg = <7>; + status = "okay"; +- riscv,isa = "rv64imafdcv"; ++ riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt"; ++ riscv,isa-base = "rv64i"; ++ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom", ++ "zicbop", "zicboz", "zicntr", "zicond", "zicsr", ++ "zifencei", "zihintpause", "zihpm", "zfh", "zba", ++ "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", ++ "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; ++ riscv,cbom-block-size = <64>; ++ riscv,cbop-block-size = <64>; ++ riscv,cboz-block-size = <64>; + mmu-type = "riscv,sv39"; + + cpu7_intc: interrupt-controller { +-- +2.54.0 + + +From c29dfca6f9c18ec9a0fbfead7b251f41ae2d782f Mon Sep 17 00:00:00 2001 +From: Aurelien Jarno +Date: Sat, 11 Apr 2026 21:41:39 +0200 +Subject: [PATCH 6/8] k1-x.dtsi: add a second compatible entry matching + upstream Linux and OpenSBI for the i2c controllers + +--- + arch/riscv/dts/k1-x.dtsi | 18 +++++++++--------- + 1 file changed, 9 insertions(+), 9 deletions(-) + +diff --git a/arch/riscv/dts/k1-x.dtsi b/arch/riscv/dts/k1-x.dtsi +index 7bb80070..458a8089 100644 +--- a/arch/riscv/dts/k1-x.dtsi ++++ b/arch/riscv/dts/k1-x.dtsi +@@ -500,7 +500,7 @@ + }; + + i2c0: twsi0@d4010800 { +- compatible = "spacemit,i2c"; ++ compatible = "spacemit,i2c", "spacemit,k1-i2c"; + reg = <0x0 0xd4010800 0x0 0x38>; + clocks = <&ccu CLK_TWSI0>; + resets = <&reset RESET_TWSI0>; +@@ -510,7 +510,7 @@ + }; + + i2c1: twsi1@d4011000 { +- compatible = "spacemit,i2c"; ++ compatible = "spacemit,i2c", "spacemit,k1-i2c"; + reg = <0x0 0xd4011000 0x0 0x38>; + clocks = <&ccu CLK_TWSI1>; + resets = <&reset RESET_TWSI1>; +@@ -520,7 +520,7 @@ + }; + + i2c2: twsi2@d4012000 { +- compatible = "spacemit,i2c"; ++ compatible = "spacemit,i2c", "spacemit,k1-i2c"; + reg = <0x0 0xd4012000 0x0 0x38>; + clocks = <&ccu CLK_TWSI2>; + resets = <&reset RESET_TWSI2>; +@@ -530,7 +530,7 @@ + }; + + i2c3: twsi3@f0614000 { +- compatible = "spacemit,i2c"; ++ compatible = "spacemit,i2c", "spacemit,k1-i2c"; + reg = <0x0 0xf0614000 0x0 0x38>; + #address-cells = <1>; + #size-cells = <0>; +@@ -538,7 +538,7 @@ + }; + + i2c4: twsi4@d4012800 { +- compatible = "spacemit,i2c"; ++ compatible = "spacemit,i2c", "spacemit,k1-i2c"; + reg = <0x0 0xd4012800 0x0 0x38>; + clocks = <&ccu CLK_TWSI4>; + resets = <&reset RESET_TWSI4>; +@@ -548,7 +548,7 @@ + }; + + i2c5: twsi5@d4013800 { +- compatible = "spacemit,i2c"; ++ compatible = "spacemit,i2c", "spacemit,k1-i2c"; + reg = <0x0 0xd4013800 0x0 0x38>; + clocks = <&ccu CLK_TWSI5>; + resets = <&reset RESET_TWSI5>; +@@ -558,7 +558,7 @@ + }; + + i2c6: twsi6@d4018800 { +- compatible = "spacemit,i2c"; ++ compatible = "spacemit,i2c", "spacemit,k1-i2c"; + reg = <0x0 0xd4018800 0x0 0x38>; + clocks = <&ccu CLK_TWSI6>; + resets = <&reset RESET_TWSI6>; +@@ -568,7 +568,7 @@ + }; + + i2c7: twsi7@d401d000 { +- compatible = "spacemit,i2c"; ++ compatible = "spacemit,i2c", "spacemit,k1-i2c"; + reg = <0x0 0xd401d000 0x0 0x38>; + clocks = <&ccu CLK_TWSI7>; + resets = <&reset RESET_TWSI7>; +@@ -578,7 +578,7 @@ + }; + + i2c8: twsi8@d401d800 { +- compatible = "spacemit,i2c"; ++ compatible = "spacemit,i2c", "spacemit,k1-i2c"; + reg = <0x0 0xd401d800 0x0 0x38>; + clocks = <&ccu CLK_TWSI8>; + resets = <&reset RESET_TWSI8>; +-- +2.54.0 + + +From ae47fc7c5a6e8d6d3f814986e0e039842e40375b Mon Sep 17 00:00:00 2001 +From: Aurelien Jarno +Date: Sat, 11 Apr 2026 22:03:07 +0200 +Subject: [PATCH 7/8] k1-x.dtsi: add a second compatible entry matching + upstream Linux and OpenSBI for the SoC + +--- + arch/riscv/dts/k1-x.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/riscv/dts/k1-x.dtsi b/arch/riscv/dts/k1-x.dtsi +index 458a8089..d2aebafd 100644 +--- a/arch/riscv/dts/k1-x.dtsi ++++ b/arch/riscv/dts/k1-x.dtsi +@@ -8,7 +8,7 @@ + #include + + / { +- compatible = "spacemit,k1x", "riscv"; ++ compatible = "spacemit,k1x", "spacemit,k1", "riscv"; + #address-cells = <2>; + #size-cells = <2>; + +-- +2.54.0 + + +From 5674271fbf35e2dc62721a43329fcd61eaf74c13 Mon Sep 17 00:00:00 2001 +From: Aurelien Jarno +Date: Sun, 12 Apr 2026 21:07:48 +0200 +Subject: [PATCH 8/8] k1-x_*.dts: add P1 regulator to BPI-F3 and MilkV Jupiter + boards + +It's need to add SBI SRST extension support in OpenSBI +--- + arch/riscv/dts/k1-x_deb1.dts | 112 ++++++++++++++++++++++++++ + arch/riscv/dts/k1-x_milkv-jupiter.dts | 112 ++++++++++++++++++++++++++ + arch/riscv/dts/m1-x_milkv-jupiter.dts | 112 ++++++++++++++++++++++++++ + 3 files changed, 336 insertions(+) + +diff --git a/arch/riscv/dts/k1-x_deb1.dts b/arch/riscv/dts/k1-x_deb1.dts +index 90fc0098..d805202e 100644 +--- a/arch/riscv/dts/k1-x_deb1.dts ++++ b/arch/riscv/dts/k1-x_deb1.dts +@@ -88,6 +88,118 @@ + status = "disabled"; + }; + ++&i2c8 { ++ status = "okay"; ++ pmic@41 { ++ compatible = "spacemit,p1"; ++ reg = <0x41>; ++ status = "okay"; ++ ++ regulators { ++ buck1 { ++ regulator-name = "vdd_core"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck2 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck3_1v8: buck3 { ++ regulator-name = "vdd_1v8"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck4 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck5 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck6 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ aldo1 { ++ regulator-name = "vdd_1v8_mmc"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ regulator-boot-on; ++ }; ++ ++ aldo2 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ aldo3 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ aldo4 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo1 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo2 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo3 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo4 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo5 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo6 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo7 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ }; ++ }; ++}; ++ + &pinctrl { + pinctrl-single,gpio-range = < + &range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4) +diff --git a/arch/riscv/dts/k1-x_milkv-jupiter.dts b/arch/riscv/dts/k1-x_milkv-jupiter.dts +index f114cf60..a3bc7922 100644 +--- a/arch/riscv/dts/k1-x_milkv-jupiter.dts ++++ b/arch/riscv/dts/k1-x_milkv-jupiter.dts +@@ -88,6 +88,118 @@ + status = "disabled"; + }; + ++&i2c8 { ++ status = "okay"; ++ pmic@41 { ++ compatible = "spacemit,p1"; ++ reg = <0x41>; ++ status = "okay"; ++ ++ regulators { ++ buck1 { ++ regulator-name = "vdd_core"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck2 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck3_1v8: buck3 { ++ regulator-name = "vdd_1v8"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck4 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck5 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck6 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ aldo1 { ++ regulator-name = "vdd_1v8_mmc"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ regulator-boot-on; ++ }; ++ ++ aldo2 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ aldo3 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ aldo4 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo1 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo2 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo3 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo4 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo5 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo6 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo7 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ }; ++ }; ++}; ++ + &pinctrl { + pinctrl-single,gpio-range = < + &range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4) +diff --git a/arch/riscv/dts/m1-x_milkv-jupiter.dts b/arch/riscv/dts/m1-x_milkv-jupiter.dts +index b9b33a67..d04111b3 100644 +--- a/arch/riscv/dts/m1-x_milkv-jupiter.dts ++++ b/arch/riscv/dts/m1-x_milkv-jupiter.dts +@@ -88,6 +88,118 @@ + status = "disabled"; + }; + ++&i2c8 { ++ status = "okay"; ++ pmic@41 { ++ compatible = "spacemit,p1"; ++ reg = <0x41>; ++ status = "okay"; ++ ++ regulators { ++ buck1 { ++ regulator-name = "vdd_core"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck2 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck3_1v8: buck3 { ++ regulator-name = "vdd_1v8"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck4 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck5 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ buck6 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3450000>; ++ regulator-ramp-delay = <5000>; ++ regulator-always-on; ++ }; ++ ++ aldo1 { ++ regulator-name = "vdd_1v8_mmc"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ regulator-boot-on; ++ }; ++ ++ aldo2 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ aldo3 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ aldo4 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo1 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo2 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo3 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo4 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo5 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo6 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ ++ dldo7 { ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <3400000>; ++ }; ++ }; ++ }; ++}; ++ + &pinctrl { + pinctrl-single,gpio-range = < + &range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4) +-- +2.54.0 + -- 2.54.0